fPGA
field programmable gate array
- 4-input lookup table
- flip-flop (store)
- interconnect --> millions of logic styles
- block RAM (registry)
- multiplier units
- carry propagation logic
- 64 floating input units
Hardware Design
- timing errors- debugging tools aren't great
What would be nice
- how it all fits together
- plug-and-play
- converts to VHDL with correct logic
- a set of usable components (ideally parametrizable)
- existing visuzalization tools
- N-bit adder (parameterizable)
- hierarchically open up --> levels are good!
- low overhead production (entrypoint to use)
- metrographics/modelsim takes a long time to learn
For next meeting
- Update project dewscription
- agree on this
- then work on system requirements
- team lead + docs + testing
- break it up
- how to make sure stuff is done
- website- wiki, something