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[Lectures] [Term
Project & Labs] [Assignments] [Resources]
Instructor
Dr.
Brian Mitchell
Drexel Phone: (215)895-2668
Office Location: SERG Lab, First Floor of CAT Building
e-mail: bmitchel@mcs.drexel.edu
Class Web Page:
http://www.mcs.drexel.edu/~bmitchel/course/cs281/cs282.html
TA & Grader: Alpa Parekh (email: alpa@IO.ece.drexel.edu)
Important Notices
See current class notices for CS282 - Systems
Architecturre II
Remember the final exam will be on
Monday, March 17th. You will have 2 hours, it will be open note, open
book, and will ONLY cover the materials that we reviewed in class (no
chapter 9 in my section). Good luck!!!
Course Description
This course covers performance evaluation and benchmarking, pipelining,
memory hierarchy, superscalar processors, multiprocessors, and interfacing
processors and peripherals.
Intended Audience
This course requires prerequisites CS281, which in turn requires ECE
200 or ECE-C 211, CS172. If you don't satisfy these prerequisites
please see me during the first class.
Class Meeting Times & TA Information
CS282 will meet from 6:00 - 9:00 PM on Monday evenings. Office hours
are by appointment or immediately before class. The TA and grader
for CS282 will be Alpa Parekh (email: alpa@IO.ece.drexel.edu).
Lectures <to
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The following table provides you access to the course lectures.
The notepad icon  provides
a link to an overview of the lecture, and the slides icon  provides
you with an online copy of the lecture notes.
| Topic/Lecture |
Description |
Notes |
Slides |
| #1: 1/6/2003 |
1. Review from CS281 - Systrems Architecture I
2. Performance Evaluation and Benchmarking |
|
|
| #2: 1/13/2003 |
1. Overview of Pipelining
2. Pipelined Datapath and Control |
|
|
| #3: 1/20/2003 |
No classes, University Holiday |
NONE |
NONE |
| #4: 1/27/2003 |
1. Dealing with Pipeline Hazards
2. Exploiting Memory Hierarchy: Cache Memory |
|
|
| #5: 2/3/2003 |
1. Measuring Cache Performance
2.
Midterm Review
(I will be out of town this
week in Dagstuhl - a software engineering workshop in Germany.
Anatole will be covering this lecture --- Many Thanks to Anatole).
If you are interested here is a link on the seminar that I will
be attending: http://www.dagstuhl.de/03061/ |
|
NONE |
| #6: 2/10/2003 |
MIDTERM EXAM |
NONE |
NONE |
| #7: 2/17/2003 |
No classes, University Holiday |
NONE |
NONE |
| #8: 2/24/2003 |
1. Exploiting Memory Hierarchy: Virtual Memory
2. I/O Devices and Communication Buses |
|
|
| #9: 3/3/2003 |
1. Interfacing I/O Devices to Memory, Processor, and
Operating System
2. Memory-mapped IO and Interrupts in SPIM |
|
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| #10: 3/10/2003 |
1. Multiprocessors: Uniform Memory Access
2. Multiprocessors: Non-Uniform Memory Access
3.
Final Review |
|
|
| #11: 3/17/2003 |
FINAL EXAM -- We will have
the final in our regular classroom. |
NONE |
NONE |
You may use the above links to obtain an on-line copy
of the lecture notes. Selected lecture notes are provided in Adobe
Acrobat and Microsoft Powerpoint format. Adobe Acrobat Reader
is a free viewer for Adobe PDF files. A copy can be downloaded from
here:
Term Project & Labs
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This course includes a term project. Students will implement
a fully functioning MIPS processor. A single cycle datapath will be
implemented by the midterm time. A pipelined datapath will be implemented
after the midterm. The project will be divided into a series of "subprojects"
designed to guide students to these two broad goals. Please follow the
link to http://www.mcs.drexel.edu/~anatole/teaching/wi03_cs282/project/project_overview.html
to find out more about the project.
Assignments & Study
Guides <to navigation
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This class includes 4 assignments (some of which have been
broken into multiple parts). For consistency with the other section
of this class, a single webpage has been created to describe the homework
assignments. Please follow the link to http://www.mcs.drexel.edu/~anatole/teaching/wi03_cs282/assignments.html
to find out more about the homework assignments.
Please note that this page also includes study guides for the midterm
and final exams.
Class Resources
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The following tools and utilities will be used in this class:
Download SPIM simulator.
spimwin.exe (local copy of Windows
version of the SPIM simulator)
spim_documentation.ps
(Documentation for the SPIM simulator)
spimwin.ps (Documentation for
Windows version of the SPIM simulator)
Intel
Processor Frequency ID Utility
VHDL Simili Compiler and simulator (free) from
Symphony EDA (this software will be used in Lab during the second
part of the course)
Textbooks
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Grading <to
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The following is a rough guideline on how your final grade will be
determined. I reserve the right to alter the below slightly based
on the performance of the class.
- Written and Programming Assignments (three) 25%
- Labs and Project 25%
- Midterm Exam 25%
- Final Exam 25%
Policies <to
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The university's Academic Honesty policy is in effect for this course.
All assignments, labs, and projects in this course are to be done individually
(unless otherwise noted). You may consult fellow students, TA's and
the professor for help, but what you hand in must be your own work.
You can review Drexel's academic honesty policy policy online by going
to http://www.drexel.edu/studentlife/studenthandbook2002/Judicial/acadhon.html.
This is a link to a section from the 2002 student handbook.
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