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CS 282 System Architecture II Syllabus

Course Description

The course covers performance evaluation and benchmarking, pipelining, memory hierarchy, superscalar processors, multiprocessors, and interfacing processors and peripherals.

Course Objective

To obtain an understanding of the effect of computer architecture on program performance and the architectural features designed to enhance performance. To understand how a processor is interfaced with various peripherals. To evaluate the performance benefits of different architectural designs.

In order to relate performance of a program to the underlying architecture, we will rely on benchmarking information (execution time, hardware statistics) obtained from hardware counters and computer simulation.

The course will have a programming component. Students will implement, using the hardware description language VHDL, a pipelined version of a hardware processor. Students will also implement a simple processor/memory bus, or an interrupt driven keyboard and console to perform simple I/O.

Audience

This is a core computer science course required by all Computer Science majors. It is the second part of a two term sequence. It should be taken in the 3rd year. Though not required, the course serves as an elective for the Computer Science minor, and is appropriate for students interested in modern computer architecture and high performance computing.

What Students Should Know Prior to this Course

  1. All prerequisite material for CS 281 (Systems Architecture I)
  2. Understand the components and format of a machine instruction set.
  3. To be able to write an assembly language program.
  4. To be able to understand how an assembly language program executes on a computer.
  5. To understand how a computer represents numbers and performs arithmetic.
  6. To build a simple ALU.
  7. To understand the datapath and control of a simple computer.
  8. To implement a simple instruction set: create an appropriate datapath and describe the control using microcode or a finite state machine.
  9. To use a hardware description language (VHDL).

What Students will be able to do upon Successfully Completing this Course

  1. To quantitatively evaluate the performance of a computer.
  2. Proficiency at measuring and analyzing the performance of software on a given architecture.
  3. To be familiar with advanced features of computer architecture designed to improve performance, such as pipelining, cache, superscalar execution, and parallelism.
  4. To improve the memory and pipeline performance of a program.
  5. To build a pipelined processor, to detect and alleviate pipeline hazards.
  6. To describe and simulate a processor using a hardware definition language.
  7. To understand how a computer communicates with peripherals.
  8. To write a program that interfaces with an I/O device through the use of polling and interrupts.

Prerequisites

CS281 (instruction set design, assembly language programming, computer arithmetic, processor datapath and control)

Textbooks

  1. David A. Patterson and John L. Hennessy, Computer Organization and Design: The Hardware/Software Interface, Third Edition, Morgan Kaufman Publishers, ISBN: 1558606041 (August 2004).
  2. Peter J. Ashenden, The Designer's Guide to VHDL, Second Edition, Morgan Kaufman Publishers, ISBN: 1558606742 (May 2002).
  3. Optional but Recommended: Randel Bryant and David O'Hallaron, Computer Systems: A Programmer's Perspective. ISBN: 013034074X
  4. Optional but Recommended: VHDL Prototyping with FPGA using the Spartan-3

Topics

  1. Performance Evaluation and Benchmarking (chapter 4)
  2. Enhancing Performance with Pipelining (chapter 6)
  3. Exploiting Memory Hierarchy: cache, virtual memory (chapter 7)
  4. Interfacing Processors and Peripherals (Chapter 8)
  5. Multiprocessors (Chapter 9 on CD)

Grading

  1. Written and Programming Assignments (three) 30% 
  2. Midterm Exam 20%
  3. Project 30%
  4. Final Exam 20%
  5. Weekly quizzes and group assignments will augment the above breakdown by plus or minus one letter grade

Last edited: 09/19/2005 anatole@cs.drexel.edu