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CS 680 Machine Organization

Course Description: 
This course covers performance evaluation and benchmarking, pipelining, memory hierarchy, superscalar processors, multiprocessors, and interfacing processors and peripherals. This course will focus on the design and implementation of computer internals, and the instruction sets that execute on them. Topics include computer arithmetic, numeric representation, CPU organization and implementation, the memory system and its impact on CPU performance. Optimizations to these design principles will also be covered and quantitatively measured, including pipelining, hazard detection and mitigation. Students will synthesize the MIPS architecture to VHDL and/or to FPGA. These Principles will be tied to practice via case studies in modern architectures, including Intel, AMD, multicore architectures, and GPU. See syllabus for more details.

Instructor
Section 900 - Bill Mongan - email: wmm24@cs.drexel.edu

Office hours
Bill: M 3-4pm, M 6-7pm, by appointment

Meeting Time
Section 900: Online

Textbook

  1. Required text: Patterson and Hennessy: Computer Organization and Design: The Hardware / Software Interface – 4th Edition. (ISBN: 978-0-12-374493-7)
  2. Recommended text: Computer Organization and Architecture: Designing for Performance – 7th Edition: William Stallings (ISBN: 0-13-185644-8)
  3. Recommended text: The Designer’s Guide to VHDL – 3rd Edition: Peter Ashenden (ISBN: 978-0-12-088785-9)
 
Last edited: 01/04/2006 wmm24@cs.drexel.edu