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ECEC 490 Processor Design

Course Description: 

This course builds upon a study in computer architecture by focusing on processor design principles, integration with an instruction set, optimization (pipelining, superscalar, speculative execution), hazard detection and mitigation. The course culminates with a lab component in which students simulate the MIPS architecture and then implement it on an FPGA. See syllabus for more details.

Instructor
Section 002 - Bill Mongan - email: wmm24@cs.drexel.edu

Office hours
Bill: Mondays 4-6pm and by appointment in UCROSS 113.
Ananth Kini (ananth.venkatesh.kini): By appointment

Meeting Time
Section 002- Monday, Wednesday and Friday 12:00 PM - 12:50 PM in Bossone 213

Textbook

1. David A. Patterson and John L. Hennessy, Computer Organization and Design and Design: The Hardware/Software Interface, Third Edition, Morgan Kaufman Publishers, ISBN: 1558606041 (August 2004).

 

Last edited: 01/04/2006 wmm24@cs.drexel.edu