CS 570 Machine Organization

 Announcments  Lectures  Programs  Course Resources  Assignments & Solutions  Grading Policy
Course Description
Covers the design and evaluation of high-performance processors, including instruction set architecture, pipelining, superscalar execution, instruction level parallelism, memory hierarchy, and high-performance I/O. Special attention is given to the effective utilization of these features in the design and optimization of performance-driven software.
Course Objective
Familiarity with advanced features of computer architecture designed to improve performance. Ability to tailor software to more effectively utilize these features. Proficiency at measuring and analyzing the performance of software on a given architecture.
(CS260 Data Structures), (CS281 Systems Architecture I), (CS282 Systems Architecture II), (MATH221 Discrete Mathematics) or equivalent undergradaute courses.
Jeremy Johnson
Office: 271 Korman Center
phone: 895-2893
e-mail: jjohnson@mcs.drexel.edu
office hours: M 1-3, W 2-3 and 5-6, Th 4-5. Additional hours by appointment.
Meeting Time
W 6:00-9:00 in Randell 329
  1. David A. Patterson and John L. Hennessy, Computer Architecture A Quantitative Approach, Second Edition, Morgan Kaufman Publishers, 1996.
  2. Kevin Dowd and Charles Severance, High Performance Computing, Second Edition, O'Reilly, 1998.


  1. Weekly Assignments (eight) 50% (6 at 5% and 2 at 10%)
  2. Project Presentation 25%
  3. Final Exam 25%

Final grades will be determined by your total points weighted according to this distribution. Grades will be curved based on relative student performance. Students who successfully complete all of the homework and do reasonably well on the exams should receive a B. Students with high exam and project scores and who do well on the assignments will receive an A.

All assignments must be completed alone unless otherwise stated. No Late assignments will be accepted without prior approval.


Reference Books
  1. More to be added.
Web Pages
Other Reference

Look Here for Important Announcements

Announcements (Thur. Nov. 30 @ 9:50pm)


This list is tentative and may be modified at the instructor's discretion.
  1. Sept. 27, 2000 (Course Introduction and Overview of High Performance Processors)
  2. Oct. 4, 2000 (Measuring Performance and Computer Benchmarks)
  3. Oct. 11, 2000 (Instruction Set Principles and Examples)
  4. Oct. 18, 2000 (Pipelining)
  5. Oct. 25, 2000 (Pipeline Hazards)
  6. Nov. 1, 2000 (Instruction Level Parallelism)
  7. Nov. 8, 2000 (Dynamic Scheduling and Branch Prediction)
  8. Nov. 8, 2000 (Memory Hierarchy Design)
  9. Nov. 22, 2000 (Thanksgiving Holiday - NO CLASS)
  10. Nov. 29, 2000 (Computer Arithmetic)
  11. Dec. 6, 2000 (Project Presentations)
  12. Dec. 13, 2000 (Final Exam)



Exam Studyguide


Created: 9/22/00 by jjohnson@mcs.drexel.edu